Understand the purpose of high-level synthesis design methods and their relation to traditional RTL-level design methods.

Learn to use an existing high-level synthesis tool to demonstrate improvements in design productivity.

Understand and apply well known scheduling methods for scheduling operations in time.

Understand and apply well known resource binding methods for binding operations to resources.

Investigate a novel aspect of high-level synthesis by researching, implementing, and demonstrating the aspect in a technical paper.