EC EN
620
Adv Digital Systems
Hours
3.0 Credit, 3 Lecture, 0 Lab
Semester
Fall
Advanced synchronous systems design; CAD and HDLs; high-speed, low-power digital circuit architectures.
1.
Understand and be able to write critically about the past, current state, and future of the semiconductor industry via the current ITRS roadmap documents and additional technical papers.
2.
Be able to do design and analysis of digital systems using both the VHDL and Verilog languages and targeting a variety of different configurable devices.
3.
Understand the issues associated with and be able to analyze the power consumption of digital designs.
4.
Be able to design and deploy appropriate verification strategies for digital systems.
5.
Understand the low level details of FPGA chip architectures sufficient to enable the creation of optimized circuits which take advantage of chip-specific features.